An-Najah Blogs :: Raed Alqadi An-Najah Blogs :: Raed Alqadi en-us Sat, 02 Jul 2022 07:00:11 IDT Sat, 02 Jul 2022 07:00:11 IDT Analysis of Resource Lower Bounds in Real-Time Applications Articles Tasks in a real-time application usually have several stringent timing resource and communication requirements Designing a distributed computing system which can meet all these requirements is a challenging problem In this paper we alleviate this problem by proposing a technique to determine a lower bound on the number of processors and resources required to meet the constraints of the application We also extend the technique to estimate the cost of a system which meets all the application constraints The proposed technique deals with most constraints found in real-time applications including deadlines release times resource requirements precedence relationships and non-zero communication times It also derives these bounds for two different models of distributed systems Distributed Synthesis of Real-Time Computer Systems Articles High-level synthesis has become commonplace in many areas of computing such as VLSI design and digital signal processing However it is just beginning to receive attention in the area of real-time systems Given a real-time application and a design library of components high-level synthesis involves three main steps: i estimation of processors and resources required to meet the constraints of the application ii identifying suitable architectures using the components from the design library and iii scheduling application tasks on the selected architecture In this paper we focus on the first and the third steps of this process Specifically we identify key issues in parallelizing these two steps We then discuss approaches to deal with these issues and present results of our distributed implementation The results of this implementation on a network of workstations show that considerable speedup in overall runtimes can be achieved by using multiple workstations An Educational Processor: A Design Approach Articles Abstract In this paper we present an educational processor developed at An-Najah National University This processor has been designed to be a powerful supplement for computer architecture and organization courses offered at the university The project is intended to develop an easily applicable methodology by which students get a valuable experience in designing and implementing complete processor with simple readily available off-the-shelf components The proposed methodology is beneficial to computer engineering students enrolled at universities specially in developing countries where advanced laboratory equipments are rarely available The design philosophy is to build a generalpurpose processor using simple and wide spread integrated circuits This methodology includes: defining an instruction set datapath layout ALU implementation memory interface controller design and implementation For testing and evaluation purposes a debugging tool is also built and implemented to serially connect the processor to a personal computer In this paper we present the methods and components used in the design and implementation phases and the tools developed to complete the design process This methodology has shown that students enrolled in the computer architecture course get the full experience in processor design without the need for advanced laboratory equipments The components used are cost efficient and methods proposed allow students to work at home hence this methodology has proven to be cost effective and yet very educational Key Words: Educational Processor RISC Architecture Computer An Efficient Parallel Gauss-Seidel Algorithm for the Solution of Load Flow Problems ArticlesAbstract: In this paper a parallel algorithm for solving the load flow problem of large power systems is presented This algorithm uses a parallel virtual machine implemented as a distributed system built from readily available PCs The proposed algorithm is based on the Gauss-Seidel algorithm usually used in the solution of load flow problems This algorithm is parallelized by distributing the bus voltages among a set of processors such that each processor will be working on 1n of the bus voltages in the circuit where n is the number of processors Since it is virtually impossible to obtain a parallel processing machine in our country the algorithm is developed over a distributed system which consists of a network of PCs Even though the communication overhead is much more than that in a real parallel machine the results show that large power systems can be solved in much less time compared to the time required for sequential algorithm usually used and that with proper selection of the number of processors the execution time is reduced by almost a factor of the number of processors Keywords: Parallel algorithm distributed system load flow communication overhead execution timeA Systematic Approach for Building Processors in a Computer Design Lab Course at Universities in Developing Countries ArticlesThis paper presents a systematic technique for building processors by using off-the-shelf components The main objective of this methodology is to introduce computer engineering electrical engineering and computer science students in developing countries to all phases of CPU design using very primitive ICs and home made tool kits Using this technique students enrolled in processor design lab can design and build processors for a defined instruction with readily available components set at minimal cost The proposed methodology has been implemented in the computer engineering department at An-Najah National University and has proven to be efficient in teaching computer architecture and processor design as well as boosting computer-engineering students self-confidence without requiring them to use very advanced laboratory equipment Nevertheless the sole purpose of this technique and the objective of building this microprocessor is pure educational and is not to introduce a new methodology for building microprocessors for commercial purposes In this paper we will present our methodology by giving an instruction set example then describing the design and implementation steps followed In addition we also discuss the primitive components used to build the datapath the controller and the software tools used in both the implementation and testing phases We will show that the proposed methodology is very effective in providing students with the experience of microprocessor design without the need for advanced and expensive kits and devices SCORM Compliant Authoring Tool Developed at An-najah University PostsSCORM Coring Compliant Authoring Tool Developed at An-Najah University This is a SCORM 2004 Compliant Authoring Tool developed at An-Najha University Simple to use with Sequencing and NavigationOCC 2.0 PostsOCC2 Article by Razi Sayyed and Dr Raed AlqadiSCORM Compliant Authoring Tools PostsSCORM Compliant Authoring Tools Dr Raed Alqadi Feb 112009 SCORM Workshop 1Improving E-Learning At An-Najah University Through the Adoption of SCORM PostsThe slides describe the a project currently being implemented at An-Najh University Improving E-Learning At An-Najah University Through the Adoption of SCORM Dr Raed Alqadi SCORM Workshop-1 Feb 112009 Funded by QIF